The invention relates to the field of computer science, and more specifically, to a method implemented by a logic of a computer memory control unit for memory sharing by processors, to a computer memory control unit comprising such logic, to a computer program comprising instructions for configuring such logic and to a data storage medium having recorded thereon such program.
Shared-memory architectures enable several processes to share portions of their address spaces. Existing shared-memory hardware architectures and their corresponding protocols for sharing memory assume a set of cooperative processors. One existing possibility is that all the processors implement a same memory access interface hardware, which is not standard, but is adapted for cooperation between the processors in order for them to access the shared memory in a smooth manner. Another existing possibility is that all processors have specific software components installed thereon that allow them to communicate together or with a central hardware in order to cooperate to emulate a virtual shared memory. Such existing possibilities require a specific component installed on each processor sharing the memory: a specific hardware interface adapted for cooperation in one case, or specific software and a virtual shared memory emulated using the unshared memories of the individual processors in the other case. This makes such architectures costly and complicated to achieve in the former case, or lagging the performance of physically shared memories in the latter.
With the growing popularity of heterogeneous architectures, there is an increased interest in the implementation of mechanisms that allow non-homogeneous architectures to execute processes that may communicate through a shared region of memory, even though the processors in question may not implement the same (or any) shared-memory protocol interface.
There is thus a need for an improved solution for memory sharing.